Fall 2017
Worked on a semi-custom VLSI design of a 64-point, 8-bit FFT. The project involved using VLSI design tools from Cadence (Virtuoso, Innovus), Synopsys (HSpice, Design Compiler, Primetime STA), and Mentor Graphics (ModelSim, Calibre) in order to synthesize, place, and route the design followed by analysis on timing, area, and power.